begin work on new device module system

This commit is contained in:
Lobo 2025-12-18 13:03:39 -03:00
parent 7b8871ffd9
commit 5769f6d470
11 changed files with 190 additions and 112 deletions

View file

@ -1,120 +1,41 @@
open Uxn
open Effect.Deep
let debug = Option.is_some (Sys.getenv_opt "DBG")
let banks = Array.init 15 (fun _ -> Bytes.create 65536)
let trace = Option.is_some (Sys.getenv_opt "UXNEMU_DEBUG")
let get_bank_memory mach bank =
if bank = 0 then Machine.ram mach
else if bank > 0 && bank < 16 then banks.(bank - 1)
else Bytes.create 0
let system_expansion mach cmd_addr =
let ram = Machine.ram mach in
let cmd = Bytes.get_uint8 ram cmd_addr in
match cmd with
| 0x00 ->
let length = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 1) in
let bank = Bytes.get_uint16_be ram (cmd_addr + 3) in
let addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 5) in
let value = Bytes.get_uint8 ram (cmd_addr + 7) in
if bank < 16 then begin
let mem = get_bank_memory mach bank in
for i = 0 to length - 1 do
let pos = (addr + i) land 0xffff in
Bytes.set_uint8 mem pos value
done
end
| 0x01 ->
let length = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 1) in
let src_bank = Bytes.get_uint16_be ram (cmd_addr + 3) in
let src_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 5) in
let dst_bank = Bytes.get_uint16_be ram (cmd_addr + 7) in
let dst_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 9) in
if src_bank < 16 && dst_bank < 16 then begin
let src_mem = get_bank_memory mach src_bank in
let dst_mem = get_bank_memory mach dst_bank in
for i = 0 to length - 1 do
let src_pos = (src_addr + i) land 0xffff in
let dst_pos = (dst_addr + i) land 0xffff in
let v = Bytes.get_uint8 src_mem src_pos in
Bytes.set_uint8 dst_mem dst_pos v
done
end
| 0x02 ->
let length = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 1) in
let src_bank = Bytes.get_uint16_be ram (cmd_addr + 3) in
let src_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 5) in
let dst_bank = Bytes.get_uint16_be ram (cmd_addr + 7) in
let dst_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 9) in
if src_bank < 16 && dst_bank < 16 then begin
let src_mem = get_bank_memory mach src_bank in
let dst_mem = get_bank_memory mach dst_bank in
for i = length - 1 downto 0 do
let src_pos = (src_addr + i) land 0xffff in
let dst_pos = (dst_addr + i) land 0xffff in
let v = Bytes.get_uint8 src_mem src_pos in
Bytes.set_uint8 dst_mem dst_pos v
done
end
| _ -> Fmt.epr "System/expansion: unknown command #%02x" cmd
module System = Varvara.System.Make ()
module Console = Varvara.Console.Make ()
module Devices = Uxn.Device.Compose (System) (Console)
let print_stack ~name (Machine.Stack { data; sp }) =
Fmt.epr "%s: @[%a@]@." name
(Fmt.on_bytes (Fmt.octets ()))
(Bytes.sub data 0 sp)
let console_vector = ref 0
let run m pc =
let dev = Machine.dev m in
let ram = Machine.ram m in
try Machine.dispatch ~trace:debug m pc with
| effect Machine.Trace (pc, instr, args), k when debug ->
Fmt.epr "PC = %04x | %6s %a@." pc (Instr.to_string instr)
(Fmt.list ~sep:(Fmt.any " ") (Fmt.fmt "%02x"))
args;
Out_channel.flush stderr;
try Machine.dispatch ~trace m pc with
| effect Machine.Trace (pc, instr, args), k ->
if trace then begin
Fmt.epr "PC = %04x | %6s %a@." pc (Instr.to_string instr)
(Fmt.list ~sep:(Fmt.any " ") (Fmt.fmt "%02x"))
args;
Out_channel.flush stderr
end;
continue k ()
| effect Machine.Trace _, k -> continue k ()
| effect Machine.BRK, _ -> ()
| effect Machine.DEI (`Byte, port), k ->
let value =
match port with
| 0x04 ->
let (Machine.Stack { sp; _ }) = Machine.wst m in
sp
| 0x05 ->
let (Machine.Stack { sp; _ }) = Machine.rst m in
sp
| _ -> Bytes.get_uint8 dev port
in
continue k value
| effect Machine.DEI (`Short, port), k ->
continue k (Util.get_uint16_wrap ~wrap:0xffff dev port)
| effect Machine.DEI (`Byte, port), k -> (
match Devices.dei m port with
| Some v -> continue k v
| None -> continue k (Bytes.get_uint8 dev port))
| effect Machine.DEI (`Short, port), k -> (
match Devices.dei2 m port with
| Some v -> continue k v
| None -> continue k (Util.get_uint16_wrap dev port))
| effect Machine.DEO (port, value), k ->
(match port with
| 0x02 -> system_expansion m value
| 0x04 ->
let (Machine.Stack s) = Machine.wst m in
s.sp <- value land 0xff
| 0x05 ->
let (Machine.Stack s) = Machine.rst m in
s.sp <- value land 0xff
| 0x0e ->
if value <> 0 then begin
print_stack ~name:"WST" (Machine.wst m);
print_stack ~name:"RST" (Machine.rst m);
Out_channel.flush stderr
end
| 0x0f -> Bytes.set_uint8 dev 0x0f value
| 0x10 -> console_vector := Bytes.get_uint16_be dev 0x10
| 0x18 ->
print_char (Char.chr value);
Out_channel.flush stdout
| 0x19 ->
prerr_char (Char.chr value);
Out_channel.flush stderr
| _ when Devices.can_handle port -> Devices.deo m port value
| 0xaa -> Varvara.File.file_lengths.(0) <- Bytes.get_uint16_be dev 0xaa
| 0xa4 ->
let addr = Bytes.get_uint16_be dev 0xa4 in
@ -186,11 +107,11 @@ let main () =
run mach 0x100;
if !console_vector <> 0 then begin
if Console.state.console_vector <> 0 then begin
let console_input ch ty =
Bytes.set_uint8 dev 0x12 ch;
Bytes.set_uint8 dev 0x17 ty;
if Bytes.get_uint8 dev 0x0f = 0 then run mach !console_vector
if Bytes.get_uint8 dev 0x0f = 0 then run mach Console.state.console_vector
in
if has_args then begin
for i = 2 to Array.length Sys.argv - 1 do
@ -211,7 +132,8 @@ let main () =
done
with Exit -> console_input 0 4
end;
if debug then begin
if trace then begin
print_stack ~name:"wst" (Machine.wst mach);
print_stack ~name:"rst" (Machine.rst mach)
end;