begin work on new device module system
This commit is contained in:
parent
7b8871ffd9
commit
5769f6d470
11 changed files with 190 additions and 112 deletions
2
exe/dune
2
exe/dune
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@ -1,4 +1,4 @@
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(executable
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(public_name uxnemu)
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(name uxnemu)
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(libraries uxn unix fmt))
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(libraries uxn varvara unix fmt))
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122
exe/uxnemu.ml
122
exe/uxnemu.ml
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@ -1,120 +1,41 @@
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open Uxn
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open Effect.Deep
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let debug = Option.is_some (Sys.getenv_opt "DBG")
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let banks = Array.init 15 (fun _ -> Bytes.create 65536)
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let trace = Option.is_some (Sys.getenv_opt "UXNEMU_DEBUG")
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let get_bank_memory mach bank =
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if bank = 0 then Machine.ram mach
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else if bank > 0 && bank < 16 then banks.(bank - 1)
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else Bytes.create 0
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let system_expansion mach cmd_addr =
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let ram = Machine.ram mach in
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let cmd = Bytes.get_uint8 ram cmd_addr in
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match cmd with
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| 0x00 ->
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let length = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 1) in
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let bank = Bytes.get_uint16_be ram (cmd_addr + 3) in
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let addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 5) in
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let value = Bytes.get_uint8 ram (cmd_addr + 7) in
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if bank < 16 then begin
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let mem = get_bank_memory mach bank in
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for i = 0 to length - 1 do
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let pos = (addr + i) land 0xffff in
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Bytes.set_uint8 mem pos value
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done
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end
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| 0x01 ->
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let length = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 1) in
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let src_bank = Bytes.get_uint16_be ram (cmd_addr + 3) in
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let src_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 5) in
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let dst_bank = Bytes.get_uint16_be ram (cmd_addr + 7) in
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let dst_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 9) in
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if src_bank < 16 && dst_bank < 16 then begin
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let src_mem = get_bank_memory mach src_bank in
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let dst_mem = get_bank_memory mach dst_bank in
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for i = 0 to length - 1 do
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let src_pos = (src_addr + i) land 0xffff in
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let dst_pos = (dst_addr + i) land 0xffff in
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let v = Bytes.get_uint8 src_mem src_pos in
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Bytes.set_uint8 dst_mem dst_pos v
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done
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end
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| 0x02 ->
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let length = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 1) in
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let src_bank = Bytes.get_uint16_be ram (cmd_addr + 3) in
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let src_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 5) in
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let dst_bank = Bytes.get_uint16_be ram (cmd_addr + 7) in
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let dst_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 9) in
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if src_bank < 16 && dst_bank < 16 then begin
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let src_mem = get_bank_memory mach src_bank in
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let dst_mem = get_bank_memory mach dst_bank in
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for i = length - 1 downto 0 do
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let src_pos = (src_addr + i) land 0xffff in
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let dst_pos = (dst_addr + i) land 0xffff in
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let v = Bytes.get_uint8 src_mem src_pos in
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Bytes.set_uint8 dst_mem dst_pos v
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done
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end
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| _ -> Fmt.epr "System/expansion: unknown command #%02x" cmd
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module System = Varvara.System.Make ()
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module Console = Varvara.Console.Make ()
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module Devices = Uxn.Device.Compose (System) (Console)
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let print_stack ~name (Machine.Stack { data; sp }) =
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Fmt.epr "%s: @[%a@]@." name
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(Fmt.on_bytes (Fmt.octets ()))
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(Bytes.sub data 0 sp)
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let console_vector = ref 0
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let run m pc =
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let dev = Machine.dev m in
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let ram = Machine.ram m in
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try Machine.dispatch ~trace:debug m pc with
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| effect Machine.Trace (pc, instr, args), k when debug ->
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try Machine.dispatch ~trace m pc with
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| effect Machine.Trace (pc, instr, args), k ->
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if trace then begin
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Fmt.epr "PC = %04x | %6s %a@." pc (Instr.to_string instr)
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(Fmt.list ~sep:(Fmt.any " ") (Fmt.fmt "%02x"))
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args;
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Out_channel.flush stderr;
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Out_channel.flush stderr
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end;
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continue k ()
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| effect Machine.Trace _, k -> continue k ()
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| effect Machine.BRK, _ -> ()
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| effect Machine.DEI (`Byte, port), k ->
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let value =
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match port with
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| 0x04 ->
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let (Machine.Stack { sp; _ }) = Machine.wst m in
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sp
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| 0x05 ->
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let (Machine.Stack { sp; _ }) = Machine.rst m in
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sp
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| _ -> Bytes.get_uint8 dev port
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in
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continue k value
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| effect Machine.DEI (`Short, port), k ->
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continue k (Util.get_uint16_wrap ~wrap:0xffff dev port)
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| effect Machine.DEI (`Byte, port), k -> (
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match Devices.dei m port with
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| Some v -> continue k v
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| None -> continue k (Bytes.get_uint8 dev port))
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| effect Machine.DEI (`Short, port), k -> (
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match Devices.dei2 m port with
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| Some v -> continue k v
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| None -> continue k (Util.get_uint16_wrap dev port))
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| effect Machine.DEO (port, value), k ->
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(match port with
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| 0x02 -> system_expansion m value
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| 0x04 ->
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let (Machine.Stack s) = Machine.wst m in
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s.sp <- value land 0xff
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| 0x05 ->
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let (Machine.Stack s) = Machine.rst m in
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s.sp <- value land 0xff
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| 0x0e ->
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if value <> 0 then begin
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print_stack ~name:"WST" (Machine.wst m);
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print_stack ~name:"RST" (Machine.rst m);
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Out_channel.flush stderr
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end
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| 0x0f -> Bytes.set_uint8 dev 0x0f value
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| 0x10 -> console_vector := Bytes.get_uint16_be dev 0x10
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| 0x18 ->
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print_char (Char.chr value);
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Out_channel.flush stdout
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| 0x19 ->
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prerr_char (Char.chr value);
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Out_channel.flush stderr
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| _ when Devices.can_handle port -> Devices.deo m port value
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| 0xaa -> Varvara.File.file_lengths.(0) <- Bytes.get_uint16_be dev 0xaa
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| 0xa4 ->
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let addr = Bytes.get_uint16_be dev 0xa4 in
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@ -186,11 +107,11 @@ let main () =
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run mach 0x100;
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if !console_vector <> 0 then begin
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if Console.state.console_vector <> 0 then begin
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let console_input ch ty =
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Bytes.set_uint8 dev 0x12 ch;
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Bytes.set_uint8 dev 0x17 ty;
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if Bytes.get_uint8 dev 0x0f = 0 then run mach !console_vector
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if Bytes.get_uint8 dev 0x0f = 0 then run mach Console.state.console_vector
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in
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if has_args then begin
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for i = 2 to Array.length Sys.argv - 1 do
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@ -211,7 +132,8 @@ let main () =
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done
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with Exit -> console_input 0 4
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end;
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if debug then begin
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if trace then begin
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print_stack ~name:"wst" (Machine.wst mach);
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print_stack ~name:"rst" (Machine.rst mach)
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end;
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34
lib/Device.ml
Normal file
34
lib/Device.ml
Normal file
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@ -0,0 +1,34 @@
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module type DEVICE = sig
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type state
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val state : state
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val can_handle : int -> bool
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val dei : Machine.machine -> int -> int option
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val dei2 : Machine.machine -> int -> int option
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val deo : Machine.machine -> int -> int -> unit
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end
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module Compose (D1 : DEVICE) (D2 : DEVICE) : DEVICE = struct
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type state = D1.state * D2.state
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let state = (D1.state, D2.state)
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let can_handle port = D1.can_handle port || D2.can_handle port
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let dei mach port =
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match (D1.can_handle port, D2.can_handle port) with
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| true, false -> D1.dei mach port
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| false, true -> D2.dei mach port
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| _ -> None
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let dei2 mach port =
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match (D1.can_handle port, D2.can_handle port) with
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| true, false -> D1.dei2 mach port
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| false, true -> D2.dei2 mach port
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| _ -> None
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let deo mach port value =
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match (D1.can_handle port, D2.can_handle port) with
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| true, false -> D1.deo mach port value
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| false, true -> D2.deo mach port value
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| _ -> ()
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end
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@ -92,7 +92,7 @@ let create code =
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Bytes.blit_string code 0 data 0x100 (String.length code);
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Machine { data; dev; stack = stack_create (); callstack = stack_create () }
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let dispatch ?(trace = false) ?(breakpoints = []) (Machine m) (pc : int) =
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let dispatch ?(trace = false) (Machine m) (pc : int) =
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let pc = ref pc in
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while true do
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@ -100,9 +100,7 @@ let dispatch ?(trace = false) ?(breakpoints = []) (Machine m) (pc : int) =
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let op = Bytes.get_uint8 m.data !pc in
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let instr = Instr.of_int op in
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let trace l = if trace then perform (Trace (!pc, instr, l)) in
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if List.mem !pc breakpoints then perform (Breakpoint !pc);
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pc := (!pc + 1) land 0xffff;
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@ -27,4 +27,4 @@ type _ Effect.t +=
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| Breakpoint : int -> unit Effect.t
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val create : string -> machine
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val dispatch : ?trace:bool -> ?breakpoints:int list -> machine -> int -> 'a
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val dispatch : ?trace:bool -> machine -> int -> 'a
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21
lib/Varvara/Console.ml
Normal file
21
lib/Varvara/Console.ml
Normal file
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@ -0,0 +1,21 @@
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type state = { mutable console_vector : int }
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module Make () : Uxn.Device.DEVICE with type state = state = struct
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type nonrec state = state
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let state = { console_vector = 0 }
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let can_handle port = port >= 0x10 && port <= 0x1f
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let dei _ _ = None
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let dei2 _ _ = None
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let deo _ port value =
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match port with
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| 0x10 -> state.console_vector <- value
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| 0x18 ->
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print_char (Char.chr value);
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Out_channel.flush stdout
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| 0x19 ->
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prerr_char (Char.chr value);
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Out_channel.flush stderr
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| _ -> ()
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end
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@ -8,10 +8,11 @@ type file_state =
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type file_device = {
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mutable filepath : string option;
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mutable state : file_state;
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mutable length : int;
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}
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let create_file_device () = { filepath = None; state = Idle }
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let file_devices = [| create_file_device (); create_file_device () |]
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let make_file () = { filepath = None; state = Idle; length = 0 }
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let file_devices = [| make_file (); make_file () |]
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let file_lengths = [| 0; 0 |]
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(* Read null-terminated string from RAM *)
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100
lib/Varvara/System.ml
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100
lib/Varvara/System.ml
Normal file
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@ -0,0 +1,100 @@
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open Uxn
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type state = { banks : bytes array }
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module Make () : Uxn.Device.DEVICE with type state = state = struct
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type nonrec state = state
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let state = { banks = Array.init 15 (fun _ -> Bytes.create 65536) }
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let can_handle port = port >= 0x00 && port <= 0x0f
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let print_stack ~name (Machine.Stack { data; sp }) =
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Fmt.epr "%s: @[%a@]@." name
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(Fmt.on_bytes (Fmt.octets ()))
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(Bytes.sub data 0 sp)
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let get_bank mach bank =
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if bank = 0 then Machine.ram mach
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else if bank > 0 && bank < 16 then state.banks.(bank - 1)
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else Bytes.create 0
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let expansion mach cmd_addr =
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let ram = Machine.ram mach in
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let cmd = Bytes.get_uint8 ram cmd_addr in
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match cmd with
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| 0x00 ->
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let length = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 1) in
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let bank = Bytes.get_uint16_be ram (cmd_addr + 3) in
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let addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 5) in
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let value = Bytes.get_uint8 ram (cmd_addr + 7) in
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if bank < 16 then begin
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let mem = get_bank mach bank in
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for i = 0 to length - 1 do
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let pos = (addr + i) land 0xffff in
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Bytes.set_uint8 mem pos value
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done
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end
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| 0x01 ->
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let length = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 1) in
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let src_bank = Bytes.get_uint16_be ram (cmd_addr + 3) in
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let src_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 5) in
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let dst_bank = Bytes.get_uint16_be ram (cmd_addr + 7) in
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let dst_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 9) in
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if src_bank < 16 && dst_bank < 16 then begin
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let src_mem = get_bank mach src_bank in
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let dst_mem = get_bank mach dst_bank in
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for i = 0 to length - 1 do
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let src_pos = (src_addr + i) land 0xffff in
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let dst_pos = (dst_addr + i) land 0xffff in
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let v = Bytes.get_uint8 src_mem src_pos in
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Bytes.set_uint8 dst_mem dst_pos v
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done
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end
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| 0x02 ->
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let length = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 1) in
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let src_bank = Bytes.get_uint16_be ram (cmd_addr + 3) in
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let src_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 5) in
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let dst_bank = Bytes.get_uint16_be ram (cmd_addr + 7) in
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let dst_addr = Util.get_uint16_wrap ~wrap:0xffff ram (cmd_addr + 9) in
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if src_bank < 16 && dst_bank < 16 then begin
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let src_mem = get_bank mach src_bank in
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let dst_mem = get_bank mach dst_bank in
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for i = length - 1 downto 0 do
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let src_pos = (src_addr + i) land 0xffff in
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let dst_pos = (dst_addr + i) land 0xffff in
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let v = Bytes.get_uint8 src_mem src_pos in
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Bytes.set_uint8 dst_mem dst_pos v
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done
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end
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| _ -> Format.eprintf "System/expansion: unknown command #%02x" cmd
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let dei m port =
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match port with
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| 0x04 ->
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let (Machine.Stack { sp; _ }) = Machine.wst m in
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Some sp
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| 0x05 ->
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let (Machine.Stack { sp; _ }) = Machine.rst m in
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Some sp
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| _ -> None
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let dei2 _ _ = None
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let deo mach port value =
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match port with
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| 0x02 -> expansion mach value
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| 0x04 ->
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let (Machine.Stack s) = Machine.wst mach in
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s.sp <- value land 0xff
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| 0x05 ->
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let (Machine.Stack s) = Machine.rst mach in
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s.sp <- value land 0xff
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| 0x0e ->
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if value <> 0 then begin
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print_stack ~name:"wst" (Machine.wst mach);
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print_stack ~name:"rst" (Machine.rst mach);
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Out_channel.flush stderr
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end
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| 0x0f -> Bytes.set_uint8 (Machine.dev mach) 0x0f value
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| _ -> ()
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end
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3
lib/Varvara/dune
Normal file
3
lib/Varvara/dune
Normal file
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@ -0,0 +1,3 @@
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(library
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(name varvara)
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(libraries uxn fmt unix))
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2
lib/dune
2
lib/dune
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@ -1,5 +1,3 @@
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(include_subdirs qualified)
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(library
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(name uxn)
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(libraries unix))
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@ -5,6 +5,7 @@
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pkgs.mkShell {
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buildInputs = with pkgs; [
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xxd
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uxn
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ocamlPackages.ocaml
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ocamlPackages.dune_3
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ocamlPackages.findlib
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