reorganization and project rename
This commit is contained in:
parent
35b0a4f6dd
commit
def41120c1
20 changed files with 42 additions and 39 deletions
|
|
@ -1,3 +0,0 @@
|
|||
(library
|
||||
(name varvara)
|
||||
(libraries uxn unix))
|
||||
3
lib/dune
3
lib/dune
|
|
@ -1,3 +0,0 @@
|
|||
(library
|
||||
(name uxn)
|
||||
(libraries unix))
|
||||
2
lib/kestrel/dune
Normal file
2
lib/kestrel/dune
Normal file
|
|
@ -0,0 +1,2 @@
|
|||
(library
|
||||
(name kestrel))
|
||||
|
|
@ -1,11 +1,11 @@
|
|||
type state = { mutable console_vector : int }
|
||||
|
||||
module Make () : Uxn.Device.DEVICE with type state = state = struct
|
||||
module Make () : Kestrel.Device.DEVICE with type state = state = struct
|
||||
type nonrec state = state
|
||||
|
||||
let state = { console_vector = 0 }
|
||||
let dei_ports = Uxn.Device.Int_set.empty
|
||||
let deo_ports = Uxn.Device.Int_set.of_list [ 0x10; 0x18; 0x19 ]
|
||||
let dei_ports = Kestrel.Device.Int_set.empty
|
||||
let deo_ports = Kestrel.Device.Int_set.of_list [ 0x10; 0x18; 0x19 ]
|
||||
let dei _ _ = assert false
|
||||
let dei2 _ _ = assert false
|
||||
|
||||
|
|
@ -1,13 +1,13 @@
|
|||
module Make () : Uxn.Device.DEVICE with type state = unit = struct
|
||||
module Make () : Kestrel.Device.DEVICE with type state = unit = struct
|
||||
type state = unit
|
||||
|
||||
let state = ()
|
||||
|
||||
let dei_ports =
|
||||
Uxn.Device.Int_set.of_list
|
||||
Kestrel.Device.Int_set.of_list
|
||||
[ 0xc0; 0xc2; 0xc3; 0xc4; 0xc5; 0xc6; 0xc7; 0xc8; 0xca ]
|
||||
|
||||
let deo_ports = Uxn.Device.Int_set.empty
|
||||
let deo_ports = Kestrel.Device.Int_set.empty
|
||||
|
||||
let dei _ port =
|
||||
let now = Unix.time () in
|
||||
|
|
@ -15,14 +15,15 @@ module type ADDR = sig
|
|||
val start : int
|
||||
end
|
||||
|
||||
module Make (Addr : ADDR) : Uxn.Device.DEVICE with type state = state = struct
|
||||
module Make (Addr : ADDR) : Kestrel.Device.DEVICE with type state = state =
|
||||
struct
|
||||
type nonrec state = state
|
||||
|
||||
let state = { filepath = None; state = Idle; length = 0 }
|
||||
let dei_ports = Uxn.Device.Int_set.empty
|
||||
let dei_ports = Kestrel.Device.Int_set.empty
|
||||
|
||||
let deo_ports =
|
||||
Uxn.Device.Int_set.of_list
|
||||
Kestrel.Device.Int_set.of_list
|
||||
[
|
||||
Addr.start + 0x0a;
|
||||
Addr.start + 0x04;
|
||||
|
|
@ -213,7 +214,7 @@ module Make (Addr : ADDR) : Uxn.Device.DEVICE with type state = state = struct
|
|||
let dei2 _ _ = assert false
|
||||
|
||||
let deo mach port value =
|
||||
let open Uxn in
|
||||
let open Kestrel in
|
||||
let ram = Machine.ram mach in
|
||||
let dev = Machine.dev mach in
|
||||
let with_success result = file_success dev (Addr.start + 0x02) result in
|
||||
|
|
@ -1,15 +1,17 @@
|
|||
open Uxn
|
||||
open Kestrel
|
||||
|
||||
type state = { banks : bytes array }
|
||||
|
||||
module Make () : Uxn.Device.DEVICE with type state = state = struct
|
||||
module Make () : Kestrel.Device.DEVICE with type state = state = struct
|
||||
type nonrec state = state
|
||||
|
||||
let state = { banks = Array.init 15 (fun _ -> Bytes.create 65536) }
|
||||
let dei_ports = Uxn.Device.Int_set.of_list [ 0x04; 0x05 ]
|
||||
let deo_ports = Uxn.Device.Int_set.of_list [ 0x02; 0x04; 0x05; 0x0e; 0x0f ]
|
||||
let dei_ports = Kestrel.Device.Int_set.of_list [ 0x04; 0x05 ]
|
||||
|
||||
let print_stack ~name (Machine.Stack { data; sp }) =
|
||||
let deo_ports =
|
||||
Kestrel.Device.Int_set.of_list [ 0x02; 0x04; 0x05; 0x0e; 0x0f ]
|
||||
|
||||
let print_stack ~name (Kestrel.Machine.Stack { data; sp }) =
|
||||
Printf.eprintf "%s " name;
|
||||
for i = sp - 8 to sp - 1 do
|
||||
Printf.eprintf "%02x%s"
|
||||
3
lib/kestrel_varvara/dune
Normal file
3
lib/kestrel_varvara/dune
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
(library
|
||||
(name kestrel_varvara)
|
||||
(libraries kestrel unix))
|
||||
Loading…
Add table
Add a link
Reference in a new issue